Fabrication of multilevel-interconnects in integrated circuits has been greatly enhanced by the use of tungsten (W) as it exhibits excellent resistance to electromigration effects, hillock formation humidity-induced corrosion, and it can be deposited by chemical vapor deposition (CVD). CVD tungsten promotes much better step coverage than do sputter or evaporated films, and selective CVD allows tungsten to fill contact holes and vias that have very high aspect ratios. CVD tungsten also allows unframed vias and contact holes to be implemented which allows greater circuit density on a given semiconductor dice.
Tungsten however, has its disadvantages, and in particular, the difficulties involved with selectively etching tungsten. Since the surface of most CVD tungsten films are fairly rough and tungsten and SiO2 form volatile fluoride by-products, it is difficult to obtain the high selective etching required to remove the unwanted tungsten stringers that remain on the low lying areas of the wafer surface.
Since a blanket tungsten film is deposited everywhere on the dice it must be etched back so that it only remains in the vias or contact holes in order to eliminate the tungsten stringers. Several methods use either a resist or a polyimide sacrificial film to planarize the tungsten. Using these methods requires the sacrificial film to be highly planarized followed by an over-etch to clear all of the tungsten stringers that result from planarization. Due to difficulty in controlling the across wafer uniformity with tungsten etching, over-etching is required. Unfortunately, over-etching can leave over-etched or recessed tungsten plugs and can also cause key-holing in the tungsten plugs. Also, non-uniformity in tungsten thickness across the wafer can result in recessed plugs.
Chemical Mechanical Polishing (CMP) is probably the preferred lower cost method to planarize tungsten films. Still when using CMP on die using fine feature widths, the CMP has its inherent problems. Dishing in large area features and non-uniform polish rate, due to varying feature spatial density top the list. A serious consequence for tungsten CMP is the fact that non-uniform thickness of the tungsten left behind in the alignment marks makes it very difficult to align the wafers at subsequent photo steps.
An article, herein incorporated by reference, entitled "DUAL DAMASCENE: A ULSI WIRING TECHNOLOGY" by Kaanta et al., Jun. 11-12, 1991 VMIC Conference, 1991 IEEE, discusses a new wiring technology that offers a unique process sequence and structure for multiple wiring levels (each with inherent planarity).
The present invention introduces a method for selective etching of a desired material, that proves to be particularly successful in remedying the selective etching of tungsten by removing the tungsten from the alignment marks through wet etching that can be controlled and therefore confined to a specific area on the wafer.